The 2021-2023 Members-at-Large on the Solid-State Circuits Society Administrative Committee are Ichiro Fujimori, Rikky Muller, Kazuko Nishimura, Esther Rodriguez-Villegas, and Hoi-Jun Yoo. Please join us in congratulating the new Members-at-Large and thanking them and our other candidates -- Dina El-Damak, Don Draper, Ana Sonia Leon, Antonio Liscidini, Shanthi Pavan, Elkim Roa, and Farhana Sheikh -- for their participation and commitment to serving. 

Solid-State Circuits Directions Inaugural Workshop: Hardware Security

Monday, December 7 at 7:00 AM PST / 10:00 AM EST/ FREE FOR ALL ATTENDEES

Solid-State Circuits Directions (SSCD) is a new technical committee within the IEEE Solid-State Circuits Society (related article). Its charter is to promote forward-looking topics, improve our connection to developments at higher abstraction levels, and to stimulate interaction with other communities. One of SSCD’s main activities will be member-driven technical workshops. The goal of this inaugural event is to introduce SSCD and its objectives in a two-hour online format. It will include two visionary talks on hardware security and its relevance to chip design.

AGENDA

7:00 AM PST: Welcome (Kenneth O, President, IEEE Solid-State Circuits Society)

7:10 AM PST: Introduction to Solid-State Circuits Directions (Boris Murmann, Stanford University)

7:20 AM PST: Call for Workshop Proposals (Vivienne Sze, MIT, and Payam Heydari, UC Irvine)

7:30 AM PST: Inaugural Workshop Presentations (Moderator: Chiraag Juvekar, Analog Devices)

Presentation 1: The Rise of the Insecure Processor (Chris Fletcher, University of Illinois)

你还不懂 Tomcat 的优化吗？ - 经典鸡翅 - 博客园:2021-5-25 · 前言 Tomcat 服务器是一个开源的轻量级Web应用服务器，在中小型系统和并发量小的场合下被普遍使用，是开发和调试Servlet、JSP 程序的首选。相信大家对于 Tomcat 已经是非常熟悉了，本篇将介绍tomcat的常见优化。

9:00 AM PST: Adjourn

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Continuous-Time Pipelined ADC for Wide-Bandwidth Wireless Receivers by Hajime Shabata

Date: November 20, 2020

Time: 11AM EST

ABSTRACT: The design space of analog-to-digital converters (ADC) can be classified by two orthogonal axes – one representing the different ADC architectures such as SAR, pipeline, and ΔΣ; the other mapping the underlying circuits as discrete-time and continuous-time configurations.  For ΔΣ ADCs, both discrete- and continuous-time design topologies have been explored extensively. With continuous-time implementations excelling in power efficiency and bandwidth, continuous-time ΔΣ ADCs have been widely used in a variety of applications including wireless communication systems. One then might ask – if continuous-time ΔΣ ADCs offer multiple key benefits over discrete-time counterparts, does the same rationale apply to other ADC architectures such as pipelined ADCs? This webinar attempts to answer this question. We first present how a continuous-time pipelined ADC can be derived from a discrete-time equivalent. We then cover the pros and cons of the continuous-time pipelined ADC against discrete-time pipelined and continuous-time ΔΣ ADCs.  We also present the implementation examples in 28nm and 16nm CMOS technologies. We will conclude the talk with a discussion of future research directions.

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